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The RC-delay and crosstalk noise of the interconnect §system are major problems in high-performance §semiconductor chips. The key is reducing the §coupling capacitance or the k-value of the insulator §between the metal lines by substituting silicon §dioxide by low-k materials or by integrating §cavities, called air gaps. Here, air gaps fabricated §by the selective Ozone-TEOS deposition are §considered to reduce the line-to-line capacitance. §Different integration schemes were fabricated; air §gaps requiring an additional lithography in Cu §damascene metallization, self-aligned air gaps in Cu §and in tungsten metallization, utilizing RIE §(reactive ion etch) processing, and air gaps §fabricated using non-conformal deposition processes §for the insulator in a 90nm Al RIE metallization §scheme. Structures were fabricated with and without §air gaps to compare the properties and to examine §different aspects such as k-value, simulations, §capacitance, electrical breakdown, leakage current, §electromigration, and self-heating by high current §application. The results show very promising §electrical properties of air gaps, exhibiting an §attractive alternative to low-k materials.